Power Estimation Methods in Digital Circuit Design
T. Grzes, V. Salauyou, I. Bulatova
Keywords: low-power design, digital circuits, power estimation
Pages: 105-114
Abstract
The present state of research in the area of low-power design methodologies and mechanisms of power dissipation in digital circuits are considered. The choice of the corresponding model of power estimation is demonstrated to exert a significant effect on quality, cost, and performance of designed digital circuits. An analysis of various power estimation techniques at different levels of abstraction for sequential and combinational circuit design is presented. Special attention is paid to power dissipation analysis of programmable logic devices.
|
